VL82C486 Single Chip 486 System Controller ASIC. Source: Wikipedia
For a person new to the field of VLSI and hardware design, it’s often one of the very first questions: What’s the difference between FPGA, ASIC, and CPLD? In another post, we have tried to answer thedifferences between FPGA and CPLD. This article will define what is FPGA and what is ASIC and we’ll attempt to elucidate the questions on FPGAs vs ASICs, we will cover the similarities and differences between them. We will outline each one’s advantages and disadvantages so that you can make an informed decision on which one to use depending on your application needs.
Here’s a table of contents so you can easily navigate to the subtopic of your interest.
- What is FPGA?
- What is ASIC?
- FPGA vs ASIC comparison summary
- FPGA vs ASIC visual comparison
- FPGA vs ASIC Cost Analysis
- How to choose between FPGA or ASIC
What is FPGA?
FPGA stands for Field Programmable Gate Array. It is an integrated circuit which can be “field” programmed to work as per the intended design. It means it can work as a microprocessor, or as an encryption unit, or graphics card, or even all these three at once. As implied by the name itself, the FPGA is field programmable. So, an FPGA working as a microprocessor can be reprogrammed to function as the graphicscard in the field, as opposed to in the semiconductor foundries. The designs running on FPGAs are generally created using hardware description languages such as VHDL and Verilog.
FPGA is made up of thousands of Configurable Logic Blocks (CLBs) embedded in an ocean of programmable interconnects. The CLBs are primarily made of Look-Up Tables (LUTs), Multiplexers and Flip-Flops. They can implement complex logic functions. Apart from CLBs, and routing interconnects, many FPGAs also contain dedicated hard-silicon blocks for various functions such as Block RAM, DSP Blocks, External Memory Controllers, PLLs, Multi-Gigabit Transceivers etc. A recent trend is providing a hard-silicon processor core (such as ARM Cortex A9 in case of Xilinx Zynq) inside the same FPGA die itself so that the processor can take care of mundane, non-critical tasks whereas FPGA can take care of high-speed acceleration which cannot be done using processors. These dedicated hardware blocks are critical in competing with ASICs.
What is ASIC?
ASIC stands for Application Specific Integrated Circuit. As the name implies, ASICs are application specific. They are designed for one sole purpose and they function the same their whole operating life. For example, the CPU inside your phone is an ASIC. It is meant to function as a CPU for its whole life. Its logic function cannot be changed to anything else because its digital circuitry is made up of permanently connected gates and flip-flops in silicon. The logic function of ASIC is specified in a similar way as in the case of FPGAs, using hardware description languages such as Verilog or VHDL. The difference in case of ASIC is that the resultant circuit is permanently drawn into silicon whereas in FPGAs the circuit is made by connecting a number of configurable blocks. For a comparison, think of creating a castle using Lego blocks versus creating a castle using concrete. The former is analogous to FPGAs, whereas the latter is analogous to ASICs. You can reuse Lego blocks to create a different design, but the concrete castle is permanent.
FPGA vs ASIC comparison summary
|1||Reconfigurable circuit. FPGAs can be reconfigured with a different design. They even have capability to reconfigure a part of chip while remaining areas of chip are still working! This feature is widely used in accelerated computing in data centres.||Permanent circuitry. Once the application specific circuit is taped-out into silicon, it cannot be changed. The circuit will work same for its complete operating life.|
|2||Design is specified generally using hardware description languages (HDL) such as VHDL or Verilog.||Same as for FPGA. Design is specified using HDL such as Verilog, VHDL etc.|
|3||Easier entry-barrier. One can get started with FPGA development for as low as USD $30.||Very high entry-barrier in terms of cost, learning curve, liaising with semiconductor foundry etc. Starting ASIC development from scratch can cost well into millions of dollars.|
|4||Not suited for very high-volume mass production.||Suited for very high-volume mass production.|
|5||Less energy efficient, requires more power for same function which ASIC can achieve at lower power.||Much more power efficient than FPGAs. Power consumption of ASICs can be very minutely controlled and optimized.|
|6||Limited in operating frequency compared to ASIC of similar process node. The routing and configurable logic eat up timing margin in FPGAs.||ASIC fabricated using the same process node can run at much higher frequency than FPGAs since its circuit is optimized for its specific function.|
|7||Analog designs are not possible with FPGAs. Although FPGAs may contain specific analog hardware such as PLLs, ADC etc, they are not much flexible to create for example RF transceivers.||ASICs can have complete analog circuitry, for example WiFi transceiver, on the same die along with microprocessor cores. This is the advantage which FPGAs lack.|
|8||FPGAs are highly suited for applications such as Radars, Cell Phone Base Stations etc where the current design might need to be upgraded to use better algorithm or to a better design. In these applications, the high-cost of FPGAs is not the deciding factor. Instead, programmability is the deciding factor.||ASICs are definitely not suited for application areas where the design might need to be upgraded frequently or once-in-a-while.|
|9||Preferred for prototyping and validating a design or concept. Many ASICs are prototyped using FPGAs themselves! Major processor manufacturers themselves use FPGAs to validate their System-on-Chips (SoCs). It is easier to make sure design is working correctly as intended using FPGA prototyping.||It is not recommended to prototype a design using ASICs unless it has been absolutely validated. Once the silicon has been taped out, almost nothing can be done to fix a design bug (exceptions apply).|
|10||FPGA designers generally do not need to care for back-end design. Everything is handled by synthesis and routing tools which make sure the design works as described in the RTL code and meets timing. So, designers can focus into getting the RTL design done.||ASIC designers need to care for everything from RTL down to reset tree, clock tree, physical layout and routing, process node, manufacturing constraints (DFM), testing constraints (DFT) etc. Generally, each of the mentioned area is handled by different specialist person.|
FPGA vs ASIC visual comparison
FPGA vs ASIC Cost Analysis
As per Rajeev Jayaraman from Xilinx, the ASIC vs FPGA cost analysis graph looks like above. The cost and unit values have been omitted from the chart since they differ with process technology used and with time. ASICs have very high Non-Recurring Engineering (NRE costs) up in millions, whereas the actual per die cost could be in cents. In the case of FPGAs, there is no NRE cost. You pay for the actual FPGA IC, and generally, get free software for that FPGA (up to a limit). So, the total cost for ASICs starts very high owing to the NRE cost, but its slope is flatter. That is, prototyping ASICs in small quantities is very costly, but in large volumes, the cost per volume becomes very less. In the case of FPGAs the IC cost is quite higher, so in large volumes, it becomes costly in comparison to ASICs.
Here is the breakdown of ASIC cost components:
- ASIC EDA tools and training
- Cost of designing
- DFT cost
- Cost of simulating
- ASIC Masks Cost
- Wafer Cost
- Wafer Processing
- Die Utilization
- Yield & Manufacturing Loss
Compared to the above list, the FPGA cost is only for the IC which can be bought off-the-shelf.
How to choose between FPGA or ASIC
Are you a newcomer who wants to learn more about VLSI and hardware design? Then FPGAs and simulation software is most suitable for you. Are you designing your own product? Cool! Ask yourself what is the target market, the expected price range, power budget, speed requirement etc for the product. Can it be done using FPGAs? If yes, then go ahead and prototype your idea. If not, you might not have any other way than to go with ASIC. In the majority of cases, it should be possible to at least prototype and validate your idea using FPGAs. And by the time you are finished with the prototype, you would yourself get the idea whether you need to go with ASIC route or not. Of course, if your design is totally breakthrough kind and extraordinary with highly specific requirements (in terms of cost, power, speed etc) then you have no option than to go with ASIC route. Otherwise, FPGAs can cater to the majority of use cases, especially when you need reconfigurable hardware.
So, there you go! We hope that you are now more enlightened about FPGAs vs ASICs and can make an informed decision on which one to go for depending on your application needs!
- Rajeev Jayaraman, Xilinx Inc, 2001https://www.doc.ic.ac.uk/~wl/teachlocal/arch/killasic.pdf
VL82C486 Single Chip 486 System Controller ASIC. Source: WikipediaIntroductionFor a person new to the field of VLSI and hardware design, it’s often one of the very first questions: What’s the difference between FPGA, ASIC, and CPLD? In another post, we have tried to answer thedifferences between FPG...
For a person new to the field of VLSI and hardware design, it’s often one of the very first questions: What’s the difference between FPGA, ASIC, and CPLD?. This article will define what is FPGA and what is ASIC and we’ll attempt to elucidate the questions on FPGAs vs ASICs, we will cover the similarities and differences between them.. FPGA vs ASIC comparison summary FPGA vs ASIC visual comparison FPGA vs ASIC Cost Analysis How to choose between FPGA or ASIC. The logic function of ASIC is specified in a similar way as in the case of FPGAs, using hardware description languages such as Verilog or VHDL.. The difference in case of ASIC is that the resultant circuit is permanently drawn into silicon whereas in FPGAs the circuit is made by connecting a number of configurable blocks.. Starting ASIC development from scratch can cost well into millions of dollars.4Not suited for very high-volume mass production.Suited for very high-volume mass production.5Less energy efficient, requires more power for same function which ASIC can achieve at lower power.Much more power efficient than FPGAs.. The routing and configurable logic eat up timing margin in FPGAs.ASIC fabricated using the same process node can run at much higher frequency than FPGAs since its circuit is optimized for its specific function.7Analog designs are not possible with FPGAs.. Many ASICs are prototyped using FPGAs themselves!. It is easier to make sure design is working correctly as intended using FPGA prototyping.It is not recommended to prototype a design using ASICs unless it has been absolutely validated.. So, designers can focus into getting the RTL design done.ASIC designers need to care for everything from RTL down to reset tree, clock tree, physical layout and routing, process node, manufacturing constraints (DFM), testing constraints (DFT) etc.. As per Rajeev Jayaraman from Xilinx, the ASIC vs FPGA cost analysis graph looks like above.. In the case of FPGAs the IC cost is quite higher, so in large volumes, it becomes costly in comparison to ASICs.. ASIC EDA tools and training Cost of designing DFT cost Cost of simulating ASIC Masks Cost Wafer Cost Wafer Processing Die Utilization Yield & Manufacturing Loss Packaging. Of course, if your design is totally breakthrough kind and extraordinary with highly specific requirements (in terms of cost, power, speed etc) then you have no option than to go with ASIC route.
Introduction CPLD or FPGA and Which one to use? This is a common question that comes up very frequently especially among students and beginners. This article attempts to uncover some details of how…
CoolRunner-II CPLD Architecture, Copyright: Xilinx Inc.. CoolRunner-II CPLD Macrocell, Copyright: Xilinx Inc.. Generalizing, we can say that, in CPLDs, there are a few hundred function blocks (or logic blocks), typically less than a thousand in number, which are accessible by a single big interconnect.. In the case of FPGAs, there are many Configurable Logic Blocks (CLBs) embedded in an ocean of programmable interconnects.. Compare that with just 512 Flip-Flops in the biggest CPLD from Xilinx!. When an FPGA is powered up, the device is always blank.. It takes some time for FPGA to get configured and the FPGA will start functioning only after configuration loading is complete.. CPLDs start working as soon as they are powered upSince FPGA has to load configuration data from external ROM and setup the fabric before it can start functioning, there is a time delay between power ON and FPGA starts working.. Sometimes you can find both CPLD + FPGA in a design.
Introduction Learning electronics can be a bit challenging sometimes, but it is really fun if you have a little patience to read, understand, and experiment. FPGAs need not be any different.
Some time back, I wanted to learn about programming FPGAs.. There are many tutorials online that will help you learn HDLs, some tutorials tell you how to do simulation, some may tell you about implementation, but no single tutorial that guides you step by step from basics to implementation.. We will be using Xilinx ISE for simulation and synthesis.. You will need ISE license installed to follow the next few parts of this tutorial.. As you may already know, FPGA essentially is a huge array of gates that can be programmed and reconfigured any time anywhere.. FPGA is indeed much more complex than a simple array of gates.. FPGA programming or FPGA development process is the process of planning, designing, and implementing a solution on FPGA.. Implementing a solution on FPGA includes building the design using one of the design entry methods such as schematics or HDL code such as Verilog or VHDL, Synthesizing the design (Synthesis, netlist generation, place, and route, etc.)
Learning Verilog itself is not a difficult task, but creating a good design can be. But we focus on simple designs here and I will try my best to explain things as simple as possible. If you had been…
They can do only one thing at a time, one and only one thing (of course I’m talking about single core devices!).. And you need to learn how to visualize many things happening at the same time in contrast to many things happening at different times, one thing at a time, in a procedural language.. In Verilog realm, modules can be considered as equivalent to components in a digital circuit, as simple as a gate or a complex entity like ALU, counter, etc… Modules are analogous to classes in C++ in a way that it is self-contained and give a finite number of methods (ports) to interact with the external world.. The image below represents a module with a few inputs and outputs.. Let us design a NOT gate in Verilog, simulate it and test it in real hardware.. ie; B = !A, where A is the input and B is the output.. NOT gate can be considered as a module with one input and one output with an internal behavior of B=!A.. Everything that goes into this module is placed in between “module” and “end module” keywords.. In Verilog, ‘wire’ can be used to connect things within a module or between two modules.. So you can use wire as input or output for a module and ‘reg’ can be used as the output of a module.. Then why “myModule” has both input and output declared as wires?. One more important thing about the above code is the keyword “assign”.